Position |
Description |
A |
CPU type |
|
|
0 = 8086 or 8088. |
|
|
2 = 286. |
|
|
3 = 386. |
|
|
4 = 486. |
|
|
5 = Pentium. |
|
|
6 = Pentium Pro, Pentium II, Pentium III |
|
|
8 / X = ? |
B |
Size of BIOS: |
|
|
0 = 64K BIOS |
|
|
1 = 128K BIOS, later changed to 1 = 1024KB |
|
|
2 = 256K BIOS, later changed to 1 = 2048KB |
|
|
3 = 512K BIOS |
|
|
4 = 1024K BIOS |
CCcc |
Major and Minor BIOS version number. |
DDDDDD |
board manufacturer code |
|
|
001xxx = Taiwanese motherboard |
|
|
002xxx = Taiwanese motherboard |
|
|
0036xx = AMI 386 motherboard, xx = Series #. |
|
|
0046xx = AMI 486 motherboard, xx = Series #. |
|
|
0050xx = US made motherboard |
|
|
0056xx = AMI Pentium motherboard, xx = Series #. |
|
|
0060xx = US made motherboard |
|
|
0066xx = AMI Pentium Pro motherboard, xx = Series #. |
|
|
008xxx = Taiwanese motherboard |
|
|
009xxx = Evaluation BIOS for Taiwanese manufacturer |
|
|
00Xxxx = Taiwanese motherboard (X is a letter) |
E |
1 = Halt on Post Error. |
F |
1 = Initialize CMOS every boot. |
G |
1 = Block pins 22 and 23 of the keyboard controller. |
H |
1 = Mouse support in BIOS/keyboard controller. |
I |
1 = Wait for <F1> key on POST errors. |
J |
1 = Display floppy error during POST. |
K |
1 = Display video error during POST. |
L |
1 = Display keyboard error during POST. |
mmddyy |
BIOS release date, mm/dd/yy. |
MMMMMMMM |
Chipset identifier or BIOS name. |
N |
Keyboard controller version number. |
Position |
Description |
AA |
Keyboard controller pin number for clock switching. |
B |
Keyboard controller clock switching pin function: |
|
|
H = High signal switches clock to high speed. |
|
|
L = High signal switches clock to low speed. |
C |
Clock switching through chip set registers: |
|
|
0 = Disable. |
|
|
1 = Enable. |
DDDD |
Port address to switch clock high. |
EE |
Data value to switch clock high. |
FF |
Mask value to switch clock high. |
GGGG |
Port Address to switch clock low. |
HH |
Data value to switch clock low. |
II |
Mask value to switch clock low. |
JJJ |
Pin number for Turbo Switch Input. |
Position |
Description |
AA |
Keyboard controller pin number for cache control. |
B |
Keyboard controller cache control pin function: |
|
|
H = High signal enables the cache. |
|
|
L = High signal disables the cache. |
C |
1 = High signal is used on the keyboard controller pin. |
DDD |
Cache control through Chipset registers: |
|
|
0 = Cache control off. |
|
|
1 = Cache control on. |
EE |
Port address to enable cache. |
FF |
Data value to enable cache. |
GGGG |
Mask value to enable cache. |
HH |
Port address to disable cache. |
II |
Data value to disable cache. |
JJ |
Mask value to disable cache. |
K |
Pin number for resetting the 82335 memory controller. |
L |
BIOS Modification Flag: |
|
|
0 = The BIOS has not been modified. |
|
|
1-9, A-Z = Number of times the BIOS has been modified. |