| Hyundai / hynix RAM chip marking |
| HYUNDAI / hynix |
Hyundai www.hea.com
Merged with Lucky Goldstar Semi [LGS] 1999, Renamed to Hynix www.hynix.com |
| HY |
HY - Hyundai / hynix |
| 57 - RAM type |
51 - DRAM
53 - DRAM (EDO ?)
57 - SDRAM
5D - SDRAM DDR
62 - SRAM slow / superslow
63 - SRAM fast
64 - SRAM pseudo |
| V - voltage |
[blank] - 5.0V
V - 3.3V
Y - 3.0V
U - 2.5V
W - 2.5V (VDDQ=1.8V)
VL - 2.35V
S - 1.8V |
| S - refresh |
S - self refresh
[none] - standard |
| 16 - memory density |
3C - 256KBit
31 - 1MBit
34 - 1MBit
4 - 4MBit, 1k refresh
41 - 4MBit
42 - 4MBit
16 - 16M, 4k refresh
17 - 16M, 2k refresh
18 - 16M, 1k refresh
32 - 32M, 4k refresh
64 - 64M, 8k refresh
65 - 64M, 4k refresh
129 - 128M, 4k refresh
28 - 128M, 4k refresh
2A - 128M, 4k refresh TCSR
257 - 256M, 8k refresh
56 - 256M, 8k refresh
12 - 512M, 8k refresh |
| 16 - bit organization |
40 - x4
41 - x4 (4CAS)
80 - x8
16 - x16
17 - x16 (2CAS)
18 - x16 (2WE)
32 - x32 (2CAS)
33 - x32 (2WE)
34 - x32 (4CAS) |
| L - bank / interface |
1 - 2banks
2 - 4 banks
0 - LVTTL
1 - SSTL
2 - SSTL2 |
| 5 - RAM type |
0 - FastPage
3 - EDO
4 - EDO
5 - EDO |
| C - die revision |
Fab Ichon: [blank] / A / B / C / D ...
Fab Cheong-ju: H / HA / HB / HC / HD ... |
| J - package option |
J - SOJ
T - TSOP-II
TC - TSOP-II 400mil
TQ - TQFP 100pin
R - TSOP reverse
S - stack package (Hynix)
K - stack package (M&T)
J - stack package (others) |
| 7 - min cycle time |
50 - 50ns
60 - 60ns
70 - 70ns |
15 - 15ns (66MHz)
12 - 12ns (83MHz)
10 - 10ns (100MHz)
10s - 10ns (100MHz CL3)
10p - 10ns (100MHz CL2&3)
8 - 8ns (125MHz)
75 - 7.5ns (133MHz)
7 - 7ns (143MHz)
6 - 6ns (166MHz)
55 - 5.5ns (183MHz)
5 - 5ns (200MHz) |
| A - RAS/CAS |
[none] - PC66 [2-2-2]
A - PC100 [3-2-3]
B - PC100 [2-2-2]
C - PC100 [2-2-2]
D - PC100 [2-2-2] |
| 9909 - date of manufacture |
99 - year of manufacture
09 - week of manufacture |
| 134A - Serialization code |
? |
